System and method of detecting and countering denial-of-service (DoS) attacks on an NVMe-oF-based computer storage array

ABSTRACT

A computer storage array detects and counters denial of service (DoS) attacks. The computer storage array provides one or more remote initiators with access to one or more storage devices connected to the computer storage array. According to an example embodiment, the computer storage array includes: a computer processor configured to run an operating system for managing networking protocols; a networking device configured to monitor and route network traffic, at a packet level to, and from the storage devices; a baseboard management controller (BMC) configured to detect a DoS attack based on monitoring of statistics of the network traffic by the networking device; a PCIe switch connecting the BMC with each of the storage devices via a PCIe bus; and a computer motherboard to which the computer processor, networking device, BMC and PCIe switch are installed.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation application of U.S. patent application Ser. No. 15/489,401 filed Apr. 17, 2017, which claims priority to and the benefit of U.S. Provisional Patent Application No. 62/479,954, titled “Method of Improving Security of NVMe-oF-based Systems from Denial-of-Service (DoS) Attacks” and filed on Mar. 31, 2017, the entire content of which is incorporated herein by reference.

RELATED FIELD

The present disclosure relates to computer storage arrays. In particular, the present disclosure relates to a system and method of detecting and countering denial-of-service (DoS) attacks on a computer storage array.

BACKGROUND

A computer storage array, also called a disk array, is generally a data storage system to which a number of data storage devices, such as hard disk drives (HDDs) and solid-state disk drives (SSDs), are connected. Computer storage arrays are designed to be highly scalable and offer shared data access to multiple initiators, who may be endpoint clients, computer servers, and/or other data consumers.

Storage devices that support the Non-Volatile Memory Express over Fabrics (NVMe-oF) specification (hereinafter, “NVMe-oF devices” for convenience) are becoming more popular, especially for use in computer storage arrays, due to their high performance and scalability. NVMe-oF is a technology specification designed to enable NVMe message-based commands to transfer data between an initiator, such as a host computer, and an NVMe-oF device or system over a network such as Ethernet, Fibre Channel, and InfiniBand. Thus, an NVMe-oF device generally includes functions of both a networking device (e.g., has Ethernet controller(s)) and a storage device (e.g., has SSD(s)).

As a networking device, an NVMe-oF device is susceptible to cyber-attacks, such as a denial-of-service (DoS) attack. A DoS attack is a cyber-attack in which the perpetrator seeks to make a machine or network resource unavailable to its intended users by temporarily or indefinitely disrupting services of a host connected to the Internet. A DoS attack is typically accomplished by flooding the targeted machine or resource with superfluous requests in an attempt to overload systems and prevent some or all legitimate requests from being fulfilled. When the flooding comes from multiple sources, the DoS attack is considered a distributed DoS (DDoS) attack.

A DoS attack is analogous to a group of people crowding the entry door or gate to a shop or business, and not letting legitimate parties enter into the shop or business, disrupting normal operations. Thus, the objective of a typical DoS attack by itself is not to steal or expose confidential data stored on a computer server or storage array, but to simply overwhelm it with bogus traffic. However, a DoS attack has been known to be used as a distraction away from other more nefarious cyber-attacks.

In some cases, an NVMe-oF device whose firmware or software has been infected or compromised may become an unwitting participant in a DoS attack against other systems. Regardless of the scenario, detecting and countering DoS attacks often require companies to expend valuable resources. Moreover, the longer a DoS attack is prolonged, the more costly it may be to the company affected by the DoS attack.

SUMMARY

Disclosed herein is computer storage array that detects and counters denial of service (DoS) attacks, the computer storage array providing one or more remote initiators with access to one or more storage devices connected to the computer storage array. According to an example embodiment, the computer storage array comprises: a computer processor configured to run an operating system for managing networking protocols; a networking device configured to monitor and route network traffic, at a packet level to, and from the storage devices; a baseboard management controller (BMC) configured to detect a DoS attack based on monitoring of statistics of the network traffic by the networking device; a PCIe switch connecting the BMC with each of the storage devices via a PCIe bus; and a computer motherboard to which the computer processor, networking device, BMC and PCIe switch are installed.

Further disclosed herein is a computer-implemented method of detecting and countering incoming denial of service (DoS) attacks on a computer storage array, the computer storage array comprising a computer processor, a networking device, a baseboard management controller (BMC), and a PCIe switch connecting the BMC with a plurality of storage devices via a PCIe bus. According to an example embodiment, the method comprises: receiving, by the networking device, network traffic from one or more sources external to the computer storage array; monitoring and routing, by the networking device, the network traffic at a packet level to and from the storage devices; detecting, by the BMC, a DoS attack based on monitoring of statistics of the network traffic by the networking device; and changing, by the BMC, a current public IP address of one or more of the storage devices that are under attack to a different public IP address in response to detecting the DoS attack.

Further disclosed herein is a computer-implemented method of detecting and countering outgoing denial of service (DoS) attacks from a computer storage array, the computer storage array comprising a computer processor, a networking device, a baseboard management controller (BMC), and a PCIe switch connecting the BMC with a plurality of storage devices via a PCIe bus. According to an example embodiment, the method comprises: receiving, by the networking device, network traffic from one or more of the storage devices; monitoring and routing, by the networking device, network traffic at a packet level; detecting, by the BMC, an outgoing DoS attack based on monitoring of statistics of the network traffic by the networking device; and disabling or quarantining, by the BMC, the storage device in response to detecting the DoS attack.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are included as part of the present disclosure, illustrate various embodiments and together with the general description given above and the detailed description of the various embodiments given below serve to explain and teach the principles described herein.

FIG. 1 illustrates an example computer storage array that utilizes a BMC to detect and counter incoming DoS attacks on or outgoing DoS attacks from the NVMe-oF devices, according to embodiments of the present system and method.

FIG. 2 illustrates an example computer-implemented method of using the BMC to detect and counter an incoming DoS attack from an external source, according to embodiments of the present system and method.

FIG. 3 illustrates an example computer-implemented method of using the BMC to detect and prevent a hijacked NVMe-oF device from participating in an outgoing DoS attack, according to embodiments of the present system and method.

The figures in the drawings are not necessarily drawn to scale and elements of similar structures or functions are generally represented by like reference numerals for illustrative purposes throughout the figures. The figures are only intended to facilitate the description of the various embodiments described herein and do not describe every aspect of the teachings disclosed herein and do not limit the scope of the claims.

DETAILED DESCRIPTION

Each of the features and teachings disclosed herein may be utilized separately or in conjunction with other features and teachings to provide the present system and method. Representative examples utilizing many of these features and teachings, both separately and in combination, are described with reference to the attached figures. While the detailed description herein illustrates to a person of ordinary skill in the art further details for practicing aspects of the present teachings, it does not limit the scope of the claims. Therefore, combinations of features disclosed in the detailed description are representative examples of the present teachings and may not be necessary to practice the teachings in the broadest sense.

According to embodiments of the present system and method, a baseboard management controller (BMC) may be used to detect and counter incoming DoS attacks directed towards NVMe-oF devices of a computer storage array, as well as outgoing DoS attacks being participated by one or more compromised NVMe-oF devices. The BMC is a low-power controller embedded in computer storage arrays, servers, switches, etc., and connects to chassis sensors (e.g., temperature sensor, power supply voltage sensor, and humidity sensor) to read environmental conditions and to control various devices. The BMC also has access to and control of NVMe-oF devices through local system buses, such as the Peripheral Component Interconnect Express (PCIe) bus and the System Management Bus (SMBus). Thus, the BMC is in a unique position to disable and/or recover any infected or hijacked NVMe-oF devices.

As traditionally implemented, the BMC operates as a slave device to a CPU, which has unidirectional control over the BMC. In other words, the traditionally implemented BMC receives instructions from the CPU and does not operate independently of the CPU. In contrast, according to example embodiments of the present system and method, the BMC may be implemented such that the BMC operates independently of and without intervention from the CPU of the computer storage array. In other words, the BMC may operate as a master device that has increased complexity. By using the BMC to detect and counter DoS attacks, rather than using a third-party server, it allows for quicker detection of incoming and outgoing DoS attacks and recovery of the computer storage array.

According to embodiments of the present system and method, the BMC may detect a DoS or DDoS attack from external sources and negate the attack by changing the public IP addresses of uplink ports of the computer storage array. The BMC may also notify a system administrator, as well as host initiators affected by the change, of the public IP address changes.

According to embodiments of the present system and method, the BMC may also detect that an NVMe-oF device and/or a motherboard or chassis has been hijacked by malicious codes, by detecting destination IP addresses that are not “known” or “registered” with the local network switch. After detection, the BMC may shut down or otherwise disable the hijacked NVMe-oF device and/or motherboard and then notify the system administrator to scan the system. In some cases, since a scan may only detect a virus infection if the virus signature is known, the BMC may erase the existing firmware or software installed on the NVMe-oF device and/or motherboard, download and install a new firmware or software onto the NVMe-oF device and/or motherboard, and reboot the affected computer storage devices.

FIG. 1 illustrates an example computer storage array that utilizes a BMC to detect and counter incoming DoS attacks on or outgoing DoS attacks from the NVMe-oF devices, according to embodiments of the present system and method. The computer storage array 100 includes a computer motherboard 101, a local CPU 102, a BMC 103, a PCIe switch 104, a networking device 105, and a plurality of NVMe-oF devices 106. In this case, the NVMe-oF devices 106 may be Ethernet-enabled SSDs (eSSDs) including an Ethernet port, a PCIe port, and an SMBus port, and the networking element 105 may be a network address translation (NAT) router, network switch (e.g., layer 3 switch), etc. The computer storage array 100 provides one or more remote initiators 107 with access to one or more of the NVMe-oF devices 106 connected to the storage array 100.

According to example embodiments, the local CPU 102, BMC 103, PCIe switch 104, and networking device 105 may be integrated or built into the motherboard 101 or may be installed onto the motherboard 101 as discrete components. These components may be implemented using hardware components, software components, or a combination of hardware and software components. Although FIG. 1 shows these components as separate components, one or more of these components may be combined. The computer motherboard 101 includes at least an Ethernet bus, a PCIe bus, and a SMBus. The local CPU 102 is configured to run an operating system for managing networking protocols. The networking device 105 is configured to monitor and route network traffic, at a packet level, to and from the NVMe-oF devices 106. The networking device 105 has access to a list of known source/destination addresses, such as a network address translation table. Any new initiator that connects to the NVMe-oF devices may be added as an entry in the list or table.

The BMC 103 communicates with a management server 108 via an out-of-band connection separate from an in-band connection established via the Ethernet bus. The BMC 103 may communicate with the management server 108 using an Intelligent Platform Management Interface (IPMI). The IPMI is a set of computer interface specifications for a computer subsystem, such as the BMC 103, that provides management and monitoring capabilities independently of the system's local CPU, firmware, and operating system.

The BMC 103 and CPU 102 are locally connected to the NVMe-oF devices 106 via local buses. For example, the PCIe switch 104 connects the BMC 103 and CPU 102 with each of the NVMe-oF devices 106 via a separate PCIe bus. The BMC 103 and CPU 102 are each capable of configuring the network settings of NVMe-oF devices 106. The BMC 103 is further configured to detect a DoS attack based on the monitoring (e.g., monitoring the statistics) of the network traffic, to and from the NVMe-oF devices 106, by the networking device 105.

FIG. 2 illustrates an example computer-implemented method of using the BMC to detect and counter an incoming DoS attack from an external source, according to embodiments of the present system and method. Although the BMC 103 and the networking device 105 are described as performing the operations below, the present system and method are not limited thereto. For example, some of the operations may be performed by other components, such as the CPU.

The network device 105 receives network traffic from one or more sources external to the computer storage array (at 201). The network device 105 monitors and routes the network traffic at a packet level. In particular, the network device 105 monitors the network traffic to determine whether a source address of an incoming data packet is a known source address (e.g., on a list of known source addresses) or an unknown source address (e.g., not on the list of known source addresses) (at 202).

If the source address of the incoming data packet is a known source address (at 203), the network device 105 routes the incoming data packet to the target NVMe-oF device 106 (at 204). If the source address of the incoming data packet is an unknown source address (at 203), the network device 105 drops the incoming data packet (at 205).

The BMC 103 detects a DoS attack based on the monitoring of the network traffic by the networking device 105. For example, if the BMC 103 determines that many incoming data packets are being dropped within a short time frame, the BMC 103 may determine that the NVMe-oF devices 106 are under DoS attack. In other words, the BMC calculates a rate at which the source addresses of incoming data packets corresponds to unknown source addresses (in this case, the rate at which incoming data packets are dropped) (at 206).

If the BMC determines that the rate exceeds a predetermined threshold (at 207), the BMC changes the current public IP address of one or more of the NVMe-oF devices that are under attack to a different public IP address (at 208). The BMC 103 may determine which of the NVMe-oF devices are under attack based on the destination address of the incoming data packets being dropped. The public IP address, for example, may correspond to a NAT public IP address used by initiators 107 to address an NVMe-oF device 106. The different public IP address may be chosen from a range of reserved IP addresses or may be determined based on a pattern or algorithm. The BMC 103 sends a notification to one or more of the initiators 107 that access the NVMe-oF devices 106 via the LAN management port, the notification indicating the public IP changes (at 209). For example, the notification may include the different public IP address or may inform the initiators to use the next IP address in the range of reserved IP addresses to access the NVMe-oF device 106 whose public IP address changed by providing a new index pointer.

Accordingly, the computer-implemented method of FIG. 2 allows the BMC 103 to quickly detect a DoS attack, counter the attack by changing the current public IP address of an NVMe-oF device 106 under attack to a different IP address, and notify the initiators who would be affected by the IP address change to use the different IP address for subsequent access to the NVMe-oF device 106. According to another embodiment, the BMC 103 may counter the DoS attack by disabling the current public address of the NVMe-oF device 106 under attack.

FIG. 3 illustrates an example computer-implemented method of using the BMC to detect and prevent a hijacked NVMe-oF device from participating in an outgoing DoS attack, according to embodiments of the present system and method. Although the BMC 103 and the networking device 105 are described as performing the operations below, the present system and method are not limited thereto. For example, some of the operations may be performed by other components, such as the CPU.

The network device 105 receives network traffic from one or more of the NVMe-oF devices (at 301). The network device 105 monitors and routes the network traffic at a packet level. In particular, the network device 105 monitors the network traffic to determine whether a destination address of an outgoing data packet sent by an NVMe-oF device is a known destination address (e.g., on a list of known destination addresses) or an unknown destination address (e.g., not on the list of known destination addresses) (at 302).

If the destination address of the outgoing data packet is a known destination address (at 303), the network device 105 routes the outgoing data packet to the destination address (at 304). If the destination address of the outgoing data packet is an unknown destination address (at 303), the network device 105 drops the outgoing data packet (at 305).

The BMC 103 detects an outgoing DoS attack based on the monitoring of the network traffic by the networking device 105. For example, if the BMC 103 determines that many outgoing data packets sent by the NVMe-oF device are being dropped within a short time frame, the BMC 103 may determine that the NVMe-oF device has been hijacked and is participating in an outgoing DoS attack. In other words, the BMC calculates a rate at which the destination addresses of the outgoing data packets sent by the NVMe-oF device correspond to unknown source addresses (in this case, the rate at which incoming data packets are dropped) (at 306).

If the BMC determines that the rate exceeds a predetermined threshold (at 307), which may indicate that the NVMe-oF has been hijacked and is participating in an outgoing DoS attack, the BMC 103 changes disables or quarantines the NVMe-oF device 106 (at 308), for example, by keeping a reset signal active until further appropriate recommended action has been determined by the system admin. The BMC 103 sends a notification to a system administrator of the computer storage array to inform the system administrator that the NVMe-oF device is compromised. According to other embodiments, if the BMC determines that the NVMe-oF has been hijacked or otherwise compromised, the BMC 103 may erase an existing firmware or software installed on the NVMe-oF device, and download and install a new firmware or software onto the NVMe-oF device.

Accordingly, the computer-implemented method of FIG. 3 allows the BMC 103 to quickly detect whether one or more NVMe-oF devices has been hijacked and become a participant in an outgoing DoS attack, counter the attack by disabling or quarantining the hijacked NVMe-oF devices, and notify the system administrator that the NVMe-oF devices are compromised.

Various embodiments of the present system and method may be implemented using hardware elements, software elements, or a combination of both. Examples of hardware elements may include processors, microprocessors, circuits, circuit elements (e.g., transistors, resistors, capacitors, inductors, and so forth), integrated circuits, application specific integrated circuits (ASIC), programmable logic devices (PLD), digital signal processors (DSP), field programmable gate array (FPGA), logic gates, registers, semiconductor device, chips, microchips, chip sets, and so forth. Examples of software may include software components, programs, applications, computer programs, application programs, system programs, machine programs, operating system software, middleware, firmware, software modules, routines, subroutines, functions, methods, procedures, software interfaces, application program interfaces (API), instruction sets, computing code, computer code, code segments, computer code segments, words, values, symbols, or any combination thereof. Determining whether an embodiment is implemented using hardware elements and/or software elements may vary in accordance with any number of factors, such as desired computational rate, power levels, heat tolerances, processing cycle budget, input data rates, output data rates, memory resources, data bus speeds and other design or performance constraints.

One or more aspects of at least one embodiment may be implemented by representative instructions stored on a machine-readable medium which represents various logic within the processor, which when read by a machine causes the machine to fabricate logic to perform the techniques described herein. Such representations, known as “IP cores” may be stored on a tangible, machine readable medium and supplied to various customers or manufacturing facilities to load into the fabrication machines that actually make the logic or processor.

While certain features set forth herein have been described with reference to various implementations, this description is not intended to be construed in a limiting sense. Hence, various modifications of the implementations described herein, as well as other implementations, which are apparent to persons skilled in the art to which the present disclosure pertains are deemed to lie within the spirit and scope of the present disclosure.

The foregoing description, for purpose of explanation, has been described with reference to specific embodiments. However, the illustrative discussions above are not intended to be exhaustive or to limit the scope of the claims to the precise forms disclosed. Many modifications and variations are possible in view of the above teachings. The embodiments were chosen in order to best explain the principles underlying the claims and their practical applications, to thereby enable others skilled in the art to best use the embodiments with various modifications as are suited to the particular uses contemplated. 

What is claimed is:
 1. A computer storage system for providing a device with access to a storage device connected to the computer storage system, the computer storage system comprising: a networking device monitoring and routing network traffic to and from the storage device based on a first address assigned to the storage device; a service processor detecting a denial of service (DoS) attack based on monitoring of statistics of the network traffic by the networking device; a switch connecting the service processor with the storage device via a bus; and a board to which the networking device, the service processor, and the switch are connected, wherein the service processor determines that a rate at which a source address of incoming data packets corresponding to a second source address exceeds a predetermined threshold, and changes the first address of the storage device to a second address, and wherein data stored in the storage device is accessible using the second address.
 2. The computer storage system of claim 1, wherein the networking device is a network address translation (NAT) router or a network switch.
 3. The computer storage system of claim 2, wherein the networking device has access to a list of known source addresses, and wherein the networking device determines whether the source address of the incoming data packet matches a first source address on the list of the known source addresses or is the second source address not on the list of known source addresses.
 4. The computer storage system of claim 2, wherein the networking device has access to a list of known destination addresses, and wherein the networking device determines whether a destination address of an outgoing data packet sent by the storage device matches one of the known destination addresses or is an unknown destination address not on the list of known destination addresses.
 5. The computer storage system of claim 4, wherein the service processor calculates a rate at which the destination address of outgoing data packets sent by the storage device corresponds to the unknown destination address, and determines whether the rate exceeds a predetermined threshold.
 6. The computer storage system of claim 5, wherein the service processor disables or quarantines the storage device based on the rate exceeding the predetermined threshold.
 7. The computer storage system of claim 5, wherein the service processor erases an existing firmware or software installed on the storage device, and installs a new firmware or software onto the storage device.
 8. The computer storage system of claim 5, wherein the service processor notifies a system administrator of the computer storage system that the storage device is compromised based on the rate exceeding the predetermined threshold.
 9. The computer storage system of claim 1, wherein the service processor sends a notification to the device that access the storage device, the notification indicating a change from the first address to the second address.
 10. The computer storage system of claim 9, wherein the networking device routes the incoming data packet to the storage device based on the source address of the incoming data packet matching one of the known source addresses, and drops the incoming data packet based on the source address of incoming data packet corresponding to the second source address.
 11. A computer-implemented method of detecting and countering incoming denial of service (DoS) attacks on a computer storage system, the computer storage system comprising a networking device, a service processor, and a switch connecting the service processor with a storage device via a bus, the method comprising: receiving, by the networking device, network traffic from one or more sources external to the computer storage system; monitoring and routing, by the networking device, the network traffic to and from the storage device based on a first address assigned to the storage device; detecting, by the service processor, a DoS attack based on monitoring of statistics of the network traffic by the networking device; changing, by the service processor, the first address of the storage device that is under attack to a second address in response to detecting the DoS attack; and sending a notification to a device that accesses the storage device, the notification indicating a change of the first address to the second address, wherein the device accesses data stored in the storage device using the second address.
 12. The computer-implemented method of claim 11, wherein the networking device is a network address translation (NAT) router or a network switch.
 13. The computer-implemented method of claim 11, wherein the networking device has access to a list of known source addresses, and wherein the networking device determines whether a source address of an incoming data packet matches a first source address on the list of the known source addresses or is a second source address not on the list of known source addresses.
 14. The computer-implemented method of claim 13, wherein the service processor calculates a rate at which the source address of incoming data packets corresponds to the second source address, and determines whether the rate exceeds a predetermined threshold.
 15. The computer-implemented method of claim 13, wherein the networking device routes the incoming data packet to the storage device based on the source address of the incoming data packet matching one of the known source addresses, and drops the incoming data packet based on the source address of the incoming data packet corresponding to the second source address.
 16. A computer-implemented method of detecting and countering outgoing denial of service (DoS) attacks from a computer storage system, the computer storage system comprising a networking device, a service processor, and a switch connecting the service processor with a storage device via a bus, the method comprising: receiving, by the networking device, network traffic from the storage device; monitoring and routing, by the networking device, network traffic based on a first address assigned to the storage device; detecting, by the service processor, an outgoing DoS attack based on monitoring of statistics of the network traffic by the networking device; and disabling or quarantining, by the service processor, the storage device in response to detecting the DoS attack; in response to detecting the DoS attack, routing an outgoing data packet from the storage device to a destination address based on the destination address of the outgoing data packet matching a known destination address of a list of known destination addresses, and dropping the outgoing data packet based on the destination address of the outgoing data packet corresponding to an unknown destination address.
 17. The computer-implemented method of claim 16, wherein the networking device has access to the list of known destination addresses, and wherein the networking device determines whether the destination address of the outgoing data packet sent by the storage device matches one of the known destination addresses or is the unknown destination address not on the list of known destination addresses.
 18. The computer-implemented method of claim 17, wherein the service processor calculates a rate at which the destination address of outgoing data packets sent by the storage device corresponds to the unknown destination address, and determines whether the rate exceeds a predetermined threshold.
 19. The computer-implemented method of claim 18, wherein the service processor sends a notification to a system administrator of the computer storage system, the notification indicating that the storage device is compromised based on the rate exceeding the predetermined threshold.
 20. The computer-implemented method of claim 18, further comprising, based on the rate exceeding the predetermined threshold: erasing, by the service processor, an existing firmware or software installed on the storage device, and installing, by the service processor, a new firmware or software onto the storage device. 